IEC 60749-23:2025

IEC 60749-23 ®
Edition 2.0 2025-12
INTERNATIONAL
STANDARD
REDLINE VERSION
Semiconductor devices - Mechanical and climatic test methods -
Part 23: High temperature operating life
ICS 31.080.01 ISBN 978-2-8327-0941-2
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CONTENTS
FOREWORD . 2
1 Scope . 1
2 Normative references . 4
3 Terms and definitions . 4
4 Test apparatus . 5
4.1 Testing requirements . 5
4.2 Circuitry . 5
4.3 Device schematic . 5
4.4 Power . 5
4.5 Device mounting . 5
4.6 Power supplies and signal sources . 5
4.7 Environmental chamber . 5
5 Procedure . 5
5.1 Stress requirements . 5
5.2 Stress duration . 5
5.3 Stress conditions . 5
5.3.1 Stress condition application . 5
5.3.2 Ambient temperature . 6
5.3.3 Operating voltage . 6
5.3.4 Biasing configurations . 6
6 Cool-down . 7
7 Measurements . 7
8 Failure criteria . 8
9 Life testing reporting . 8
10 Summary . 9
Bibliography . 10

Table 1 – Additional stress requirements for parts not tested within 96 h time window . 8

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Semiconductor devices - Mechanical and climatic test methods -
Part 23: High temperature operating life

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC Publication(s)"). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
may be required to implement this document. However, implementers are cautioned that this may not represent
the latest information, which may be obtained from the patent database available at https://patents.iec.ch. IEC
shall not be held responsible for identifying any or all such patent rights.
This redline version of the official IEC Standard allows the user to identify the changes made
to the previous edition IEC 60749-23:2004+AMD1:2011 CSV. A vertical bar appears in the
margin wherever a change has been made. Additions are in green text, deletions are in
strikethrough red text.
IEC 60749-23 has been prepared by IEC technical committee 47: Semiconductor devices. It is
an International Standard.
This second edition cancels and replaces the first edition published in 2004 and
Amendment 1:2011. It is based on JEDEC JESD22-A108G. It is used with permission of the
copyright holder, JEDEC Solid State Technology Association. This edition constitutes a
technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) absolute stress test definitions and resultant test durations have been updated.
The text of this International Standard is based on the following documents:
Draft Report on voting
47/2962/FDIS 47/2983/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 60749 series, published under the general title Semiconductor
devices - Mechanical and climatic test methods, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
1 Scope
This part of IEC 60749 specifies the test used to determine the effects of bias conditions and
temperature on solid state devices over time. It simulates the device operating condition in an
accelerated way and is primarily for device qualification and reliability monitoring. A form of
high temperature bias life using a short duration, popularly known as "burn-in", may can be
used to screen for infant-mortality related failures. The detailed use and application of burn-in
is outside the scope of this document.
2 Normative references
The following referenced documents are indispensable for the application of this document. For
dated references, only the edition cited applies. For undated references, the latest edition of
the referenced document (including any amendments) applies.
IEC 60747 (all parts), Semiconductor devices – Discrete devices and integrated circuits
IEC 60749-34:, Semiconductor devices – Mechanical and climatic test methods – Part 34:
Power cycling
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1
maximum operating voltage
maximum supply voltage at which a device is specified to operate in compliance with the
applicable device specification or data sheet
3.2
absolute maximum rated voltage
maximum voltage that may can be applied to a device, beyond which damage (latent or
otherwise) may is likely to occur
Note 1 to entry: It is frequently specified by device manufacturers for a specific device or technology, or both.
3.3
absolute maximum rated junction temperature
maximum junction temperature of an operating device beyond which damage (latent or
otherwise) may will likely occur
Note 1 to entry: It is frequently specified by device manufacturers for a specific device or technology, or both.
Note 2 to entry: Manufacturers may can also specify maximum case temperatures for specific packages.
———————
To be published.
4 Test apparatus
4.1 Testing requirements
The performance of this test requires equipment that is capable of providing the particular stress
conditions to which the test samples will be subjected.
4.2 Circuitry
The circuitry through which the samples will be biased must shall be designed to take into
account several considerations, as outlined below.
evice schematic
4.3 D
The biasing and operating schemes shall consider the limitations of the device and shall not
overstress the devices or contribute to thermal runaway.
4.4 Power
The test circuit shall be designed to limit power dissipation such that, if a device failure occurs,
excessive power will not be applied to other devices in the sample.
4.5 Device mounting
Equipment design, if required, shall provide for mounting of devices to minimize adverse effects
while parts are under stress (e.g. improper heat dissipation).
4.6 Power supplies and signal sources
Instruments (such as digital voltmeters, oscilloscopes, etc.) used to set up and monitor power
supplies and signal sources shall be calibrated and have good long-term stability.
4.7 Environmental chamber
The environmental chamber shall be capable of maintaining the specified temperature within a
tolerance of ±5 °C throughout the chamber while parts are loaded and unpowered.
5 Procedure
5.1 Stress requirements
The sample devices shall be subjected to the specified or selected stress conditions for the
time and temperature required.
5.2 Stress duration
The bias life duration is intended to meet or exceed an equivalent field lifetime under use
conditions. The duration is established based on the acceleration of the stress. The stress
duration is specified by the relevant specification. Interim measurements may be are performed
as necessary, subject to the restrictions in Clause 7.
5.3 Stress conditions
5.3.1 Stress condition application
The stress condition shall be applied continuously (except during interim measurement periods).
The time spent elevating the chamber to accelerated conditions, reducing chamber conditions
to room ambient and conducting the interim measurements shall not be considered a portion of
the total specified test duration.
5.3.2 Ambient temperature
Unless otherwise specified, The ambient temperature and bias for high temperature stress shall
be adjusted to maintain the temperature within the desired range. Typically, a junction
temperature of 125 °C for 1 000 h is used for this test. Unless otherwise specified, The ambient
temperature for low temperature stress shall be a maximum of –10 °C.
The ambient temperature and bias for high temperature stress shall be adjusted to result in a
minimum junction temperature of the devices under stress of 125 °C unless otherwise specified
for extended use or other environments. A common legacy stress duration of 1 000 h is often
used for the benchmark test. The ambient temperature for low temperature stress shall be a
maximum of –10 °C. For products which experience temperature variations during high
temperature stress, it is acceptable to use higher or lower junction temperatures for specified
blocks and dynamic stress patterns as long as application lifetime equivalent stress duration
targets are achieved.
NOTE Devices designed for use in an extended temperature environment can be stressed at temperatures which
can extend up to 250 °C. The stress temperature can exceed the operating temperature but not the absolute
maximum rated temperature and voltage of the technology.
5.3.3 Operating voltage
Unless otherwise specified, the operating voltage should be the maximum operating voltage
specified for the device unless the conditions of 5.3.1 cannot be met. If the maximum operating
voltage is not used, then the stress voltage for the test shall be reported. A higher voltage is
permitted in order to obtain lifetime acceleration from voltage as well as temperature; this
voltage shall not exceed the absolute maximum rated voltage for the device and shall be agreed
upon by the device manufacturer.
5.3.4 Biasing configurations
5.3.4.1 Biasing configuration considerations
Biasing configurations detailed below may can be bias stress (static or pulsed) or operating
stress (dynamic). Depending upon the biasing configuration, supply and input voltages may can
be grounded or raised to a maximum potential chosen to ensure a stressing temperature is not
higher than the maximum-rated junction temperature. Device outputs may can be unloaded or
loaded, to achieve the specified output voltage level. If a device has a thermal shutdown feature,
it shall not be biased in a manner that could cause the device to go into thermal shutdown.
5.3.4.2 High temperature forward bias (HTFB)
The high temperature forward bias (HTFB) test is configured to forward bias major power
handling junctions of the device samples. The devices may be are operated in either a static or
a pulsed forward bias mode. Pulsed operation is used to stress the devices at, or near,
maximum-rated current levels. The particular bias conditions should be determined to bias the
maximum number of the solid-state junctions in the device. The HTFB test is typically applied
on power devices, diodes and discrete transistor devices (not typically applied to integrated
circuits). The HTFB test, when applied to power devices, is complementary to IEC 60749-34.
5.3.4.3 High temperature operating life (HTOL)/low temperature operating life (LTOL)
The HTOL/LTOL test is configured to bias the operating nodes of the device samples. The
devices may be operated in a dynamic operating mode. Typically, several input parameters may
be adjusted to control internal power dissipation. These include supply voltages, clock
frequencies, input signals, etc. that may be operated even outside their specified values, but
resulting in predictable and non-destructive behaviour of the devices under stress. The
particular bias conditions should be determined to bias the maximum number of potential
operating nodes in the device. The HTOL test is typically applied on logic and memory devices.
The LTOL test is intended to look for failures caused by hot carriers and is typically applied on
memory devices or devices with submicron device dimensions.
5.3.4.4 High temperature reverse bias (HTRB)
The high temperature reverse bias (HTRB) test is configured to reverse bias major power
handling junctions of the device samples. The devices are characteristically operated in a static
operating mode at, or near, the maximum rated breakdown voltage or current levels, or both.
The particular bias conditions should be determined to bias the maximum number of the solid-
state junctions in the device. The HTRB test is typically applied on power devices.
5.3.4.5 High temperature gate bias (HTGB)
The high temperature gate bias (HTGB) test biases gate or other oxides of the device samples.
The devices are normally operated in a static mode at, or near, maximum rated oxide breakdown
voltage levels. The particular bias conditions should be determined to bias the maximum
number of gates in the device. The HTGB test is typically used for power devices.
6 Cool-down
Devices on high temperature stress shall be cooled to 55 °C or lower before removing the bias.
Cooling under bias is not required for a given technology, if verification data is provided by the
manufacturer. The interruption of bias for up to 1 min, for the purpose of moving the devices to
cool-down positions separate from the chamber within which life testing was performed, shall
not be considered removal of bias. All specified electrical measurements shall be completed
prior to any reheating of the devices, except for interim measurements subject to the restrictions
of Clause 7.
NOTE Bias refers to application of voltage to power pins.
7 Measurements
The measurements, specified in the applicable life test specification, shall be made at the
beginning of the life test, at the end of each interim period and at the conclusion of the life test.
Interim and final measurements may could include high temperature testing. However, testing
at elevated temperatures shall only be performed after completion of specified room (and lower)
temperature test measurements. After interim testing, bias shall be applied to the parts before
heat is applied to the chamber, or within 10 min of loading the final parts into a hot chamber.
Electrical testing shall be completed as soon as possible and no later than 96 h (defined
as >10 V) or 168 h for all other devices after removal of bias from devices. If the availability of
test equipment or other factors make meeting this requirement difficult, bias shall be maintained
on the devices; either by extending the bias life stress or keeping the devices under bias at
room temperature until this 96 h window can be met this is either at the stress temperature or
room temperature and the bias can be reduced to nominal voltage from any accelerated voltage
in use for stress.
If the devices have been removed from bias and the 96 hour time window is exceeded, the
stress shall be resumed for the duration specified in Table 1 prior to completion of the
measurements. After an interim measurement, the stress shall be continued from the point of
interruption. This and the high temperature testing restrictions of this clause need not be met if
verification data for a given technology is provided.
Table 1 – Additional stress requirements for parts not tested within 96 h time window
Hours by which 96 h > 0 h but ≤ 168 h > 168 h but ≤ 336 h > 336 h but ≤ 504 h Other
time window has
been exceeded
Additional stress hours The lesser of 24 h The lesser of 48 h The lesser of 72 h The lesser of 24 h
required prior to for each 168 h
OR 50 % of the OR 50 % of the OR 50 % of the
performing electrical (week) by which the
stress interval stress interval since stress interval since
test 96 h time window
since the last test the last test readout the last test readout
has been exceeded
readout
OR 50 % of the
stress interval since
the last test readout
8 Failure criteria
A device is classified as a failure if it does not meet the requirements of the relevant
specification. Device requirements may be are found in the individual parts of the IEC 60747
series.
9 Life testing reporting
The following items shall be specified in the applicable life test specification and report:
a) special preconditioning, when applicable;
b) stress temperature (chamber ambient);
c) stress duration;
d) stress mounting, if special instructions are necessary;
e) stress condition and stress circuit schematic;
f) sample size and acceptance number;
g) time to complete endpoint measurements, if other than specified in Clause 7;
h) operating mode;
i) interim read points, if required;
j) maximum junction temperature during stress;
verification data if cool-down under bias is not performed.
k)
10 Summary
The following details shall be specified in the applicable specification:
a) stress temperature (chamber ambient) (see 5.3.2);
b) stress duration (see 5.2);
c) stress mounting, if special instructions are needed necessary (see 5.2);
d) stress condition and stress circuit schematic (see 5.3);
e) sample size and acceptance number;
f) time to complete endpoint measurements, if other than specified in Clause 7;
g) operating mode (see 5.3.3);
h) interim read points, if required (see Clause 7);
i) maximum junction temperature during stress (see 3.3);
j) verification data if cool-down under bias is not performed (see Clause 7);
k) life test reporting.
Bibliography
IEC 60747 (all parts), Semiconductor devices - Discrete devices and integrated circuits
IEC 60749-34, Semiconductor devices - Mechanical and climatic test methods - Part 34: Power
cycling
___________
IEC 60749-23 ®
Edition 2.0 2025-12
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor devices - Mechanical and climatic test methods -
Part 23: High temperature operating life

Dispositifs à semiconducteurs - Méthodes d'essais mécaniques et climatiques -
Partie 23: Durée de vie en fonctionnement à haute température
ICS 31.080.01  ISBN 978-2-8327-0903-0

CONTENTS
FOREWORD . 2
1 Scope . 4
2 Normative references . 4
3 Terms and definitions . 4
4 Test apparatus . 4
4.1 Testing requirements . 4
4.2 Circuitry . 4
4.3 Device schematic . 5
4.4 Power . 5
4.5 Device mounting . 5
4.6 Power supplies and signal sources . 5
4.7 Environmental chamber . 5
5 Procedure . 5
5.1 Stress requirements . 5
5.2 Stress duration . 5
5.3 Stress conditions . 5
5.3.1 Stress condition application . 5
5.3.2 Ambient temperature . 6
5.3.3 Operating voltage . 6
5.3.4 Biasing configurations . 6
6 Cool-down . 7
7 Measurements . 7
8 Failure criteria . 7
9 Life testing reporting . 8
10 Summary . 8
Bibliography . 9

Table 1 – Additional stress requirements for parts not tested within time window . 7

INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Semiconductor devices - Mechanical and climatic test methods -
Part 23: High temperature operating life
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC Publication(s)"). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
may be required to implement this document. However, implementers are cautioned that this may not represent
the latest information, which may be obtained from the patent database available at https://patents.iec.ch. IEC
shall not be held responsible for identifying any or all such patent rights.
IEC 60749-23 has been prepared by IEC technical committee 47: Semiconductor devices. It is
an International Standard.
This second edition cancels and replaces the first edition published in 2004 and
Amendment 1:2011. It is based on JEDEC JESD22-A108G. It is used with permission of the
copyright holder, JEDEC Solid State Technology Association. This edition constitutes a
technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) absolute stress test definitions and resultant test durations have been updated.
The text of this International Standard is based on the following documents:
Draft Report on voting
47/2962/FDIS 47/2983/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 60749 series, published under the general title Semiconductor
devices - Mechanical and climatic test methods, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
1 Scope
This part of IEC 60749 specifies the test used to determine the effects of bias conditions and
temperature on solid state devices over time. It simulates the device operating condition in an
accelerated way and is primarily for device qualification and reliability monitoring. A form of
high temperature bias life using a short duration, popularly known as "burn-in", can be used to
screen for infant-mortality related failures. The detailed use and application of burn-in is outside
the scope of this document.
2 Normative references
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1
maximum operating voltage
maximum supply voltage at which a device is specified to operate in compliance with the
applicable device specification or data sheet
3.2
absolute maximum rated voltage
maximum voltage that can be applied to a device, beyond which damage (latent or otherwise)
is likely to occur
Note 1 to entry: It is frequently specified by device manufacturers for a specific device or technology, or both.
3.3
absolute maximum rated junction temperature
maximum junction temperature of an operating device beyond which damage (latent or
otherwise) will likely occur
Note 1 to entry: It is frequently specified by device manufacturers for a specific device or technology, or both.
Note 2 to entry: Manufacturers can also specify maximum case temperatures for specific packages.
4 Test apparatus
4.1 Testing requirements
The performance of this test requires equipment that is capable of providing the particular stress
conditions to which the test samples will be subjected.
4.2 Circuitry
The circuitry through which the samples will be biased shall be designed to take into account
several considerations, as outlined below.
4.3 Device schematic
The biasing and operating schemes shall consider the limitations of the device and shall not
overstress the devices or contribute to thermal runaway.
4.4 Power
The test circuit shall be designed to limit power dissipation such that, if a device failure occurs,
excessive power will not be applied to other devices in the sample.
4.5 Device mounting
Equipment design, if required, shall provide for mounting of devices to minimize adverse effects
while parts are under stress (e.g. improper heat dissipation).
4.6 Power supplies and signal sources
Instruments (such as digital voltmeters, oscilloscopes, etc.) used to set up and monitor power
supplies and signal sources shall be calibrated and have good long-term stability.
4.7 Environmental chamber
The environmental chamber shall be capable of maintaining the specified temperature within a
tolerance of ±5 °C throughout the chamber while parts are loaded and unpowered.
5 Procedure
5.1 Stress requirements
The sample devices shall be subjected to the specified or selected stress conditions for the
time and temperature required.
5.2 Stress duration
The bias life duration is intended to meet or exceed an equivalent field lifetime under use
conditions. The duration is established based on the acceleration of the stress. The stress
duration is specified by the relevant specification. Interim measurements are performed as
necessary, subject to the restrictions in Clause 7.
5.3 Stress conditions
5.3.1 Stress condition application
The stress condition shall be applied continuously (except during interim measurement periods).
The time spent elevating the chamber to accelerated conditions, reducing chamber conditions
to room ambient and conducting the interim measurements shall not be considered a portion of
the total specified test duration.
5.3.2 Ambient temperature
The ambient temperature and bias for high temperature stress shall be adjusted to result in a
minimum junction temperature of the devices under stress of 125 °C unless otherwise specified
for extended use or other environments. A common legacy stress duration of 1 000 h is often
used for the benchmark test. The ambient temperature for low temperature stress shall be a
maximum of –10 °C. For products which experience temperature variations during high
temperature stress, it is acceptable to use higher or lower junction temperatures for specified
blocks and dynamic stress patterns as long as application lifetime equivalent stress duration
targets are achieved.
NOTE Devices designed for use in an extended temperature environment can be stressed at temperatures which
can extend up to 250 °C. The stress temperature can exceed the operating temperature but not the absolute
maximum rated temperature and voltage of the technology.
5.3.3 Operating voltage
Unless otherwise specified, the operating voltage should be the maximum operating voltage
specified for the device unless the conditions of 5.3.1 cannot be met. If the maximum operating
voltage is not used, then the stress voltage for the test shall be reported. A higher voltage is
permitted in order to obtain lifetime acceleration from voltage as well as temperature; this
voltage shall not exceed the absolute maximum rated voltage for the device and shall be agreed
upon by the device manufacturer.
5.3.4 Biasing configurations
5.3.4.1 Biasing configuration considerations
Biasing configurations detailed below can be bias stress (static or pulsed) or operating stress
(dynamic). Depending upon the biasing configuration, supply and input voltages can be
grounded or raised to a maximum potential chosen to ensure a stressing temperature is not
higher than the maximum-rated junction temperature. Device outputs can be unloaded or loaded,
to achieve the specified output voltage level. If a device has a thermal shutdown feature, it shall
not be biased in a manner that could cause the device to go into thermal shutdown.
5.3.4.2 High temperature forward bias (HTFB)
The high temperature forward bias (HTFB) test is configured to forward bias major power
handling junctions of the device samples. The devices are operated in either a static or a pulsed
forward bias mode. Pulsed operation is used to stress the devices at, or near, maximum-rated
current levels. The particular bias conditions should be determined to bias the maximum number
of the solid-state junctions in the device. The HTFB test is typically applied on power devices,
diodes and discrete transistor devices (not typically applied to integrated circuits). The HTFB
test, when applied to power devices, is complementary to IEC 60749-34.
5.3.4.3 High temperature operating life (HTOL)/low temperature operating life (LTOL)
The particular bias conditions should be determined to bias the maximum number of potential
operating nodes in the device. The HTOL test is typically applied on logic and memory devices.
The LTOL test is intended to look for failures caused by hot carriers and is typically applied on
memory devices or devices with submicron device dimensions.
5.3.4.4 High temperature reverse bias (HTRB)
The high temperature reverse bias (HTRB) test is configured to reverse bias major power
handling junctions of the device samples. The devices are characteristically operated in a static
operating mode at, or near, the maximum rated breakdown voltage or current levels, or both.
The particular bias conditions should be determined to bias the maximum number of the solid-
state junctions in the device. The HTRB test is typically applied on power devices.
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